Multicore memristor realized by high resolution electrical detection of mobile domain walls

The current-induced manipulation of mobile domain walls in nanoscopic magnetic wires and their electrical detection are keys to the development of domain-wall-based memory and logic devices that go beyond today’s binary technologies. [1] A racetrack device with a single domain wall is functionally equivalent to a memristor in which the output signal is proportional to the position of the boundary core. In such device, analogue-like output can be achieved upon the current-induced motion of the domain wall which can be a platform for neuromorphic computing. [2-3] A commonly known memristor or resistive switching memory cell possesses a single boundary core that separates physical states (e.g., doped vs. undoped or conducting vs. insulating or formation vs. rapture). [4-5] Racetrack devices, however, can possess multiple mobile domain walls in a single racetrack cell, in contrast to conventional memristors. As a result, the racetrack with multiple domain walls can generate highly complex time-signal outputs upon operation. Here we discuss how multiple mobile domain walls can be effectively traced with high resolution (spatial resolution of better than 40 nm) using a set of specially engineered anomalous Hall detectors integrated into the racetracks. In order to visualize the complex signal, we use Poincaré plots and suggest static and dynamic phase space analyses for interpreting the dynamics of domain walls. In particular, we introduce a multi-core memristor model to describe the dynamics of domain walls. Furthermore, we show that the domain wall dynamics and stochasticity can be readily controlled in racetracks with deep sub-micron dimensions. We strongly believe this work will serve as an important platform for for neuromorphic devices with higher-order complexity. [6-7]

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