Challenges and solutions in Racetrack memory fabrication: Innovative etching techniques for MTJ integration

NISE Seminar

  • Date: Dec 18, 2024
  • Time: 10:30 AM - 11:30 AM (Local Time Germany)
  • Speaker: Jiho Yoon
  • Location: Max-Planck-Institut für Mikrostrukturphysik, Weinberg 2, 06120 Halle (Saale)
  • Room: Lecture Hall, B.1.11
Challenges and solutions in Racetrack memory fabrication: Innovative etching techniques for MTJ integration

Racetrack memory (RTM) is an emerging class of spintronic memory devices that has the potential to go beyond conventional silicon-based CMOS memory technologies, owing to its non-volatility and scalability. In RTM, data is stored in magnetized nanowires as multiple magnetic domains [1]. Here, the magnetic domain walls (DWs), boundaries between neighboring domains, are key elements that physically define the size of bits.

The working principle of RTM can be divided into two parts: data access and read/write. Data access relies on the current-induced domain wall motion (CIDWM) phenomenon, which shifts bits to their desired positions along the racetrack nanowire on a nanosecond (ns) timescale. This advancement is enabled by recent progress in material development and the discovery of highly efficient novel torques [2]. Read/write operations can be achieved through various methods such as spin-orbit torque (SOT)-driven switching for writing and anomalous Hall effect (AHE) for reading [3,4]. However, these methods are not suitable from a technological perspective, due to limitations such as scaling challenges, low signal-to-noise ratio, and other factors. As a result, the spin-dependent electron tunneling effect, known as the tunneling magnetoresistance (TMR) phenomenon, is currently the most promising platform for both reading and writing method in RTM.

Despite its strong conceptual foundation, RTM remains at a low technological readiness level due to challenges in integrating magnetic tunnel junctions (MTJs) onto the racetrack nanowire—the essential component for read/write operations. Fabricating MTJs, in particular, requires highly precise etching process that minimize the damage to both the thin MgO insulating tunnel barrier and the underneath racetrack magnetic layer [5].

In this seminar, we will discuss current challenges in integrating MTJs onto racetrack nanowires, focusing on device fabrication, including lithographic patterning and the subsequent dry etching process. To address these challenges, we will introduce a novel etching technique known as atomic layer etching (ALE), which combines cyclic surface modification and material removal processes. Specifically, we will explore the potential of ALE process for magnetic metals, such as Co, Fe, and CoFeB, and how it can be applied to RTM device fabrication.

References

[1] Parkin et al., Science 320 (5873), 190-194 (2008)

[2] Parkin and Yang, Nat. Nanotechnol. 10, 195-198 (2015)

[3] Dao et al., Nano Letters 19 (9), 5930-5937 (2019)

[4] Jeon et al., Science 386 (6719), 315-322 (2024)

[5] Raymenants et al., Nat. Electron. 4, 392-398 (2021)

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